1. Field of the Invention
The present invention relates to electronic devices, and, in particular, relates to devices and methods of forming capacitor structures for integrated circuitry.
2. Description of the Related Art
Since the introduction of the digital computer, electronic storage devices have been a vital resource for the retention of binary data. Conventional semiconductor electronic storage devices typically incorporate capacitor and transistor type structures, which are referred to as Dynamic Random Access Memory (DRAM), that temporarily store binary data based on the charged state of the capacitor structure. In general, this type of semiconductor Random Access Memory (RAM) often requires densely packed capacitor structures that are easily accessible for electrical interconnection therewith. Many of these capacitor structures are fabricated with layers of material including semiconductor, dielectric, and metal.
Conventional fabrication techniques of capacitor structures include processing steps that require etching of a recess in a substrate so as to form a cell container, contiguous deposition of a lower conductive layer on the substrate and within the recess, and etching of the lower conductive layer so as to form a stud electrode within the recess. Additional processing steps include removal of the surrounding substrate material laterally adjacent to the stud electrode. Then, to form the rest of the capacitor structure, a dielectric layer followed by a top conductive layer can be deposited on the stud electrode. Unfortunately, during deposition of the lower conductive layer, excessive overfill of the recessed cell container is a common occurrence due to the need for complete surface coverage. The excessive overfill material is removed and discarded, which is wasteful and inefficient. In addition, fabrication efficiency can be reduced if expensive conductive materials, such as noble metals including Platinum, are excessively deposited and subsequently removed during etching. This can result in increased manufacturing costs, which is also undesirable.
Hence, there currently exists a need to reduce manufacturing costs associated with fabricating capacitor structures by simplifying inefficient procedures. To this end, there also exists a need to increase fabrication efficiency by improving the processing techniques associated with fabricating capacitor structures.